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2010-2012 Microchip Technology Inc.
DS41412E-page 45
PIC18(L)F2X/4XK22
FIGURE 2-11:
FSCM TIMING DIAGRAM
OSCFIF
System
Clock
Output
Sample Clock
Failure
Detected
Oscillator
Failure
Note:
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
(Q)
Test
Clock Monitor Output
TABLE 2-4:
REGISTERS ASSOCIATED WITH CLOCK SOURCES
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
116
IPR2
OSCFIP
C1IP
C2IP
EEIP
BCL1IP
HLVDIP
TMR3IP CCP2IP
129
OSCCON
IDLEN
IRCF<2:0>
OSTS
HFIOFS
SCS<1:0>
32
OSCCON2
PLLRDY
SOSCRUN
—
MFIOSEL SOSCGO
PRISD
MFIOFS LFIOFS
33
OSCTUNE
INTSRC
PLLEN
TUN<5:0>
37
PIE2
OSCFIE
C1IE
C2IE
EEIE
BCL1IE
HLVDIE
TMR3IE CCP2IE
125
PIR2
OSCFIF
C1IF
C2IF
EEIF
BCL1IF
HLVDIF
TMR3IF CCP2IF
120
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used by clock sources.
TABLE 2-5:
CONFIGURATION REGISTERS ASSOCIATED WITH CLOCK SOURCES
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CONFIG1H
IESO
FCMEN
PRICLKEN PLLCFG
FOSC<3:0>
357
CONFIG2L
—
BORV<1:0>
BOREN<1:0>
PWRTEN
358
CONFIG3H
MCLRE
—
P2BMX
T3CMX
HFOFST CCP3MX
PBADEN
CCP2MX
360
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for clock sources.
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